Publications

Publications

Conference and journal papers, book chapters, doctoral theses, and patents from the group. Links go to the publisher's version (DOI) and, where we have one, a PDF.

2026

  1. Can Fine-Grain Multi-threading Subsume VLIW?
    Scott Pomerville, Soner Önder, Gang-Ryung Uh, David Whalley
    LCTES 2026 · Proceedings of the 27th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, pp. 129–141

2024

  1. Statically Controlled Synchronized Lane Architectures
    Scott Pomerville
    Ph.D. thesis · Michigan Technological University

2023

  1. Facilitating the Bootstrapping of a New ISA
    Abigail Mortensen, Scott Pomerville, David Whalley, Soner Önder, Gang-Ryung Uh
    LCTES 2023 · Proceedings of the 24th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, pp. 2–12

2021

  1. Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache
    Michael Stokes, David Whalley, Soner Önder
    ACM TACO · ACM Transactions on Architecture and Code Optimization, vol. 18, no. 3, pp. 1–22

2020

  1. Dynamic Dependency Collapsing
    Görkem Aşılıoğlu
    Ph.D. thesis · Michigan Technological University
  2. Demand-Driven Execution Using Future Gated Single Assignment Form
    Omkar Javeri
    Ph.D. thesis · Michigan Technological University

2019

  1. Improving Energy Efficiency by Memoizing Data Access Information
    Michael Stokes, Ryan Baird, Zhaoxiang Jin, David Whalley, Soner Önder
    ISLPED 2019 · IEEE/ACM International Symposium on Low Power Electronics and Design, pp. 1–6

2018

  1. Dynamic Memory Dependence Predication
    Zhaoxiang Jin, Soner Önder
    ISCA 2018 · Proceedings of the 45th Annual International Symposium on Computer Architecture, Los Angeles, pp. 235–246
  2. A Two-Phase Recovery Mechanism
    Zhaoxiang Jin, Soner Önder
    ICS 2018 · Proceedings of the 2018 International Conference on Supercomputing, Beijing, pp. 107–117
  3. Decoupling Address Generation from Loads and Stores to Improve Data Access Energy Efficiency
    Michael Stokes, Ryan Baird, Zhaoxiang Jin, David Whalley, Soner Önder
    LCTES 2018 · Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, Philadelphia, pp. 65–75
  4. Mitigating the Effect of Misspeculations in Superscalar Processors
    Zhaoxiang Jin
    Ph.D. thesis · Michigan Technological University
  5. Demand Driven Execution Pipeline
    Omkar Javeri, Tino Moore, Soner Önder
    Technical report · Michigan Technological University

2015

  1. LaZy Superscalar
    Görkem Aşılıoğlu, Zhaoxiang Jin, Murat Köksal, Omkar Javeri, Soner Önder
    ISCA 2015 · Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, pp. 260–271
  2. Mower: A New Design for Non-blocking Misprediction Recovery
    Zhaoxiang Jin, Görkem Aşılıoğlu, Soner Önder
    ICS 2015 · Proceedings of the 29th ACM International Conference on Supercomputing, Newport Beach, pp. 285–294

2014

  1. Verifying Micro-architecture Simulators Using Event Traces
    Hui Meen Nyew, Nilufer Önder, Soner Önder, Zhenlin Wang
    ICS 2014 · Proceedings of the 28th ACM International Conference on Supercomputing, Munich, pp. 323–332
  2. Single Assignment Compiler, Single Assignment Architecture: Future Gated Single Assignment Form; Static Single Assignment with Congruence Classes
    Shuhan Ding, John Earnest, Soner Önder
    CGO 2014 · Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, Orlando, pp. 196–207
  3. Mining and Verification of Temporal Events with Applications in Computer Micro-Architecture Research
    Hui Meen Nyew
    Ph.D. thesis · Michigan Technological University (co-advised with Nilufer Önder)

2013

  1. A First-Order Logic Based Framework for Verifying Simulations
    Hui Meen Nyew, Nilufer Önder, Soner Önder, Zhenlin Wang
    AAAI 2013 · Proceedings of the 27th AAAI Conference on Artificial Intelligence

2012

  1. Future Value Based Single Assignment Program Representations and Optimizations
    Shuhan Ding
    Ph.D. thesis · Michigan Technological University

2011

  1. Discovering Patterns for Architecture Simulation by Using Sequence Mining
    Pinar Senkul, Nilufer Önder, Soner Önder, Engin Maden, Hui Meen Nyew
    Book chapter · In Pattern Discovery Using Sequence Data Mining: Applications and Studies (P. Kumar, P. Radha Krishna, S. Bapi Raju, eds.), IGI Global

2010

  1. Unrestricted Code Motion: A Program Representation and Transformation Algorithms Based on Future Values
    Shuhan Ding, Soner Önder
    CC 2010 · Compiler Construction, LNCS 6011, Springer, Paphos, pp. 26–45
  2. Methods and Systems for Ordering Instructions Using Future Values
    Soner Önder
    U.S. Patent 7,747,993 · Filed Dec 30, 2004; issued Jun 29, 2010

2009

  1. Fine-Grain State Processors
    Peng Zhou
    Ph.D. thesis · Michigan Technological University

2008

  1. Improving Single-Thread Performance with Fine-Grain State Maintenance
    Peng Zhou, Soner Önder
    CF 2008 · Proceedings of the 5th ACM Conference on Computing Frontiers, Ischia, pp. 251–260
  2. ADL++: Object-Oriented Specification of Complicated Instruction Sets and Microarchitectures
    Soner Önder
    Book chapter · In Processor Description Languages (P. Mishra and N. Dutt, eds.), Morgan Kaufmann, chapter 10, pp. 247–274

2006

  1. Feedback-Directed Memory Disambiguation Through Store Distance Analysis
    Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
    ICS 2006 · Proceedings of the 20th ACM International Conference on Supercomputing, Cairns, pp. 278–287
  2. Path-Based Reuse Distance Analysis
    Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
    CC 2006 · Compiler Construction, LNCS 3923, Springer, Vienna, pp. 32–46

2005

  1. Instruction Based Memory Distance Analysis and Its Application to Optimization
    Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
    PACT 2005 · 14th International Conference on Parallel Architectures and Compilation Techniques, St. Louis, pp. 27–37
  2. Fast Branch Misprediction Recovery in Out-of-Order Superscalar Processors
    Peng Zhou, Soner Önder, Steve Carr
    ICS 2005 · Proceedings of the 19th ACM International Conference on Supercomputing, Boston, pp. 41–50
  3. A Case for a Working-Set-Based Memory Hierarchy
    Steve Carr, Soner Önder
    CF 2005 · Proceedings of the 2nd ACM Conference on Computing Frontiers, Ischia, pp. 252–261
  4. Specification of Intel IA-32 Using an Architecture Description Language
    Jeff Bastian, Soner Önder
    Book chapter · In Architecture Description Languages, IFIP vol. 176, Springer, pp. 151–166

2004

  1. Reuse-Distance-Based Miss-Rate Prediction on a Per Instruction Basis
    Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
    MSP 2004 · Proceedings of the 2004 ACM Workshop on Memory System Performance, Washington, DC, pp. 60–68

2002

  1. Cost Effective Memory Dependence Prediction Using Speculation Levels and Color Sets
    Soner Önder
    PACT 2002 · International Conference on Parallel Architectures and Compilation Techniques, Charlottesville, pp. 232–241
  2. Optimizing Static Power Dissipation by Functional Units in Superscalar Processors
    Siddharth Rele, Santosh Pande, Soner Önder, Rajiv Gupta
    CC 2002 · Compiler Construction, LNCS 2304, Springer, Grenoble, pp. 85–100
  3. Dynamic Memory Disambiguation in the Presence of Out-of-Order Store Issuing
    Soner Önder, Rajiv Gupta
    JILP · Journal of Instruction-Level Parallelism, vol. 4

2001

  1. Load and Store Reuse Using Register File Contents
    Soner Önder, Rajiv Gupta
    ICS 2001 · Proceedings of the 15th ACM International Conference on Supercomputing, Naples, pp. 289–302
  2. Instruction Wake-Up in Wide Issue Superscalars
    Soner Önder, Rajiv Gupta
    Euro-Par 2001 · Euro-Par 2001 Parallel Processing, LNCS 2150, Springer, Manchester, pp. 418–427
  3. Improving Software Pipelining by Hiding Memory Latency with Combined Loads and Prefetches
    Michael Bedy, Steve Carr, Soner Önder, Philip Sweany
    Book chapter · In Interaction between Compilers and Computer Architectures (G. Lee and P.-C. Yew, eds.), Kluwer Academic Publishers, pp. 69–88

1999

  1. Caching and Predicting Branch Sequences for Improved Fetch Effectiveness
    Soner Önder, Jun Xu, Rajiv Gupta
    PACT 1999 · International Conference on Parallel Architectures and Compilation Techniques, Newport Beach
  2. Dynamic Memory Disambiguation in the Presence of Out-of-Order Store Issuing
    Soner Önder, Rajiv Gupta
    MICRO-32 · Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture, Haifa, pp. 170–176

1998

  1. Superscalar Execution with Dynamic Data Forwarding
    Soner Önder, Rajiv Gupta
    PACT 1998 · International Conference on Parallel Architectures and Compilation Techniques, Paris, pp. 130–135
  2. Automatic Generation of Microarchitecture Simulators
    Soner Önder, Rajiv Gupta
    ICCL 1998 · IEEE International Conference on Computer Languages, Chicago, pp. 80–89

1995

  1. SINAN: A Forwarding Multithreaded Architecture
    Soner Önder, Rajiv Gupta
    HiPC 1995 · International Conference on High Performance Computing, New Delhi, pp. 347–354